RNX-RZG2UL-OSM U-Boot: Difference between revisions
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{{#vardefine:UBOOT_BRANCH|v2021.10/rz}} | {{#vardefine:UBOOT_BRANCH|v2021.10/rz}} | ||
{{#vardefine:DEFCONFIG_NAME|rnx_rzg2ul_osm_defconfig}} | {{#vardefine:DEFCONFIG_NAME|rnx_rzg2ul_osm_defconfig}} | ||
= Overview = | [[File:RNX-RZG2UL-OSM_top.png|thumb]] | ||
== Overview == | |||
The U-Boot bootloader is used for low-level initialization and operating system loading. | The U-Boot bootloader is used for low-level initialization and operating system loading. | ||
= Building U-BOOT for {{#var:HARDWARE_NAME}} = | == Building U-BOOT for {{#var:HARDWARE_NAME}} == | ||
This U-BOOT is based on https://github.com/renesas-rz/renesas-u-boot-cip, branch {{#var:UBOOT_BRANCH}} | This U-BOOT is based on https://github.com/renesas-rz/renesas-u-boot-cip, branch {{#var:UBOOT_BRANCH}} | ||
=== Set up the cross-compiler and CPU architecture === | |||
$ export ARCH=arm64 | $ export ARCH=arm64 | ||
$ export CROSS_COMPILE=/opt/cross/aarch64-ronetix-linux-11.1/bin/aarch64-ronetix-linux-gnu- | $ export CROSS_COMPILE=/opt/cross/aarch64-ronetix-linux-11.1/bin/aarch64-ronetix-linux-gnu- | ||
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http://download.ronetix.at/toolchains/crosstool-ng | http://download.ronetix.at/toolchains/crosstool-ng | ||
=== Clone the latest revision of the repo === | |||
$ git clone https://github.com/ronetix/u-boot.git u-boot-ronetix --depth=1 -b {{#var:UBOOT_BRANCH}} | $ git clone https://github.com/ronetix/u-boot.git u-boot-ronetix --depth=1 -b {{#var:UBOOT_BRANCH}} | ||
$ cd u-boot-ronetix | $ cd u-boot-ronetix | ||
=== Configure === | |||
$ make {{#var:DEFCONFIG_NAME}} | $ make {{#var:DEFCONFIG_NAME}} | ||
=== Build === | |||
$ make | $ make | ||
= Build Results = | === Build Results === | ||
{| class="wikitable" | {| class="wikitable" | ||
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|} | |} | ||
= Create FIP image = | == Create FIP image == | ||
Create a new Firmware package fip.bin that contains BL31 and U-BOOT: | Create a new Firmware package fip.bin that contains BL31 and U-BOOT.<br> | ||
$ cp arm-trusted-firmware/tools/fiptool/fiptool . | The BL31 image is part of the ARM trusted firmware package - see here how to build it:<br> | ||
$ cp arm-trusted-firmware/build/g2ul/release/bl31.bin . | * [[RNX-RZG2UL-OSM_ARM_Trusted_Firmware]] | ||
$ cp ../arm-trusted-firmware/tools/fiptool/fiptool . | |||
$ cp ../arm-trusted-firmware/build/g2ul/release/bl31.bin . | |||
$ ./fiptool create --align 16 --soc-fw bl31.bin --nt-fw u-boot.bin fip.bin | $ ./fiptool create --align 16 --soc-fw bl31.bin --nt-fw u-boot.bin fip.bin | ||
= Programming the FIP image = | == Programming the FIP image == | ||
The FIP image should be programmed at address 0x1D200 in the QSPI Flash. | The FIP image file '''''./fip.bin''''' should be programmed at address 0x1D200 in the QSPI Flash. | ||
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{{SeeAlso}} | |||
Latest revision as of 16:13, 18 March 2024
Overview
The U-Boot bootloader is used for low-level initialization and operating system loading.
Building U-BOOT for RNX-RZG2UL-OSM
This U-BOOT is based on https://github.com/renesas-rz/renesas-u-boot-cip, branch v2021.10/rz
Set up the cross-compiler and CPU architecture
$ export ARCH=arm64 $ export CROSS_COMPILE=/opt/cross/aarch64-ronetix-linux-11.1/bin/aarch64-ronetix-linux-gnu-
Cross-compiler can be downloaded from here: http://download.ronetix.at/toolchains/crosstool-ng
Clone the latest revision of the repo
$ git clone https://github.com/ronetix/u-boot.git u-boot-ronetix --depth=1 -b v2021.10/rz $ cd u-boot-ronetix
Configure
$ make rnx_rzg2ul_osm_defconfig
Build
$ make
Build Results
| File Name | Description |
|---|---|
| u-boot | U-BOOT ELF image used for JTAG debugging |
| u-boot-dtb.bin | U-BOOT image with DTB |
Create FIP image
Create a new Firmware package fip.bin that contains BL31 and U-BOOT.
The BL31 image is part of the ARM trusted firmware package - see here how to build it:
$ cp ../arm-trusted-firmware/tools/fiptool/fiptool . $ cp ../arm-trusted-firmware/build/g2ul/release/bl31.bin . $ ./fiptool create --align 16 --soc-fw bl31.bin --nt-fw u-boot.bin fip.bin
Programming the FIP image
The FIP image file ./fip.bin should be programmed at address 0x1D200 in the QSPI Flash.