RNX-RZG2UL-OSM Programming Images - Revision history

Ilko: Add link to the full boot log

2024-03-20T14:20:12Z

Add link to the full boot log

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 == Boot log ==
 * Select QSPI Boot mode and reset the board:
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 {{SeeAlso}}

Ilko: Add "Setting Boot mode" in TOC

2024-03-18T10:12:27Z

Add "Setting Boot mode" in TOC

← Older revision		Revision as of 12:12, 18 March 2024
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	The images can be programmed using the [[RNX-RZG2UL-OSM_Flash_Writer\|Renesas Flash Writer]] or [{{#var:URL_PEEDI}} PEEDI JTAG Flash Programmer].		The images can be programmed using the [[RNX-RZG2UL-OSM_Flash_Writer\|Renesas Flash Writer]] or [{{#var:URL_PEEDI}} PEEDI JTAG Flash Programmer].

			== Setting Boot mode ==
	== ~~Programming BL2, BL31 and U-BOOT~~ ==
	On the carrier board, set the boot mode to "SCIF Download mode".		On the carrier board, set the boot mode to "SCIF Download mode".
	{\| class="wikitable"		{\| class="wikitable"
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	\|}		\|}


			== Programming BL2, BL31 and U-BOOT ==

	=== Programming QSPI Flash using PEEDI JTAG Flash Programmer ===		=== Programming QSPI Flash using PEEDI JTAG Flash Programmer ===

Ilko: Modify to use Template:SeeAlso

2023-11-16T14:44:05Z

Modify to use Template:SeeAlso

Ilko: Update

2023-11-07T11:07:05Z

Update

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 * Linux Kernel with Device Tree Blob
 * RootFS - root file system
 After successful YOCTO building, all these images are available in tmp/deploy/images/rnx-rzg2ul-osm:
@@ Line 45: / Line 54: @@
 The images can be programmed using the [[RNX-RZG2UL-OSM_Flash_Writer|Renesas Flash Writer]] or [{{#var:URL_PEEDI}} PEEDI JTAG Flash Programmer].
 = Programming BL2, BL31 and U-BOOT =
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 === Serial terminal connection ===
 A serial terminal connection through USB to UART bridge is required.
 * Connect a USB Type-microAB cable to J3 (UART DBG).
 * Start a terminal app (for example minicom) and configure to use the second FTDI port.

Ilko: Initial creation

2023-11-07T10:59:41Z

Initial creation

New page

{{#vardefine:HARDWARE_NAME|RNX-RZG2UL-OSM}}
{{#vardefine:URL_PEEDI|https://ronetix.at/product/peedi-jtag-swd-bdm-emulator-and-flash-programmer}}
[[File:RNX-RZG2UL-OSM_top.png|thumb]]
= Overview =
For a complete Linux System, the CPU Module {{#var:HARDWARE_NAME}} requires the following images:
* Boot Loader stage 2 (BL2) Trusted Boot Firmware with boot parameters block
* Boot Loader stage 3-1 (BL3-1) EL3 Runtime Firmware
* U-BOOT
* Linux Kernel with Device Tree Blob
* RootFS - root file system

After successful YOCTO building, all these images are available in tmp/deploy/images/rnx-rzg2ul-osm:
{| class="wikitable"
|-
! Image
! Description
|-
| bl2_bp-rnx-rzg2ul-osm.bin bl2_bp-rnx-rzg2ul-osm.srec
| Boot Loader stage 2 (BL2) + boot parameters block
|-
| fip-rnx-rzg2ul-osm.bin fip-rnx-rzg2ul-osm.srec
| Boot Loader stage 3-1 + U-BOOT
|-
| Image-rnx-rzg2ul-osm.bin
| Linux Kernel
|-
| rnx-rzg2ul-osm.dtb
| Linux Device Tree Blob
|-
| core-image-bsp-rnx-rzg2ul-osm.ext4
| Root File System
|-
| core-image-bsp-rnx-rzg2ul-osm.wic.gz
| Partitioned Image containing everything
|-
| Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot
| Renesas Flash Writer
|}

Alternatively, for development purpose, the images can be built standalone: 
* [[RNX-RZG2UL-OSM_ARM_Trusted_Firmware]]
* [[RNX-RZG2UL-OSM_U-Boot]]
* [[RNX-RZG2UL-OSM_Linux]]
* [[RNX-RZG2UL-OSM_Flash_Writer]]

The images can be programmed using the [[RNX-RZG2UL-OSM_Flash_Writer|Renesas Flash Writer]] or [{{#var:URL_PEEDI}} PEEDI JTAG Flash Programmer].

= Programming BL2, BL31 and U-BOOT =

== Programming QSPI Flash using PEEDI JTAG Flash Programmer ==
PEEDI should be configured to use the '''rzg2ul.cfg''' configuration file. 

<pre>
PEEDI - Powerful Embedded Ethernet Debug Interface
Copyright (c) 2005-2023 www.ronetix.at - All rights reserved
Hw:1.2, Fw:23.1010.3, SN: PD-0000-0B6B-301F
------------------------------------------------------------

peedi>
++ info: opening file 'tftp://192.168.3.5/rzg2ul.cfg'
++ info: loading file 'tftp://192.168.3.5/rzg2ul.cfg'...
++ info: done, loaded 1131 meaningful bytes.
++ info: opening file 'eep:license.txt'
++ info: loading file 'eep:license.txt'...
++ info: done, loaded 534 meaningful bytes.

++ info: Wakeup 200 ms
++ info: Target Vref = 1.71V
++ info: RESET and TRST asserted
++ info: TRST released
++ info: RESET released
++ info: wait 200 ms
++ info: BYPASS check passed, 1 TAP controller(s) detected
++ info: TAP: IDCODE = 0x6BA00477, Cortex-ARMv8

rzg2>
++ info: TAP 0: requesting Debug and System power-up (CDBGPWRUPREQ, CSYSPWRUPREQ)
++ info: core 0: using APB port 0
++ info: core 0: Found VFP and NEON features
++ info: core 0: stopped by user request, PC=0x0000000000003B08, CPSR=0x400003CD
++ info: core 0: Cortex-A55, CPUID = 0x412FD050
++ info: core 0: connected
++ info: core 0: initialized
</pre>

* Check the QSPI Flash:
rzg2> '''flash info'''

FLASH configuration for core #0:
CPU: RENESAS_RZ
Device: AT25QL128 ID: 0x1F 0x42
3-BYTE command set, Normal Read
Chip size: 16 MB
Write chunk size: 256 bytes
Erase chunk size: 64 KB

FLASH commands default parameters:
flash read 0x00000000 0x01000000
flash blank 0x00000000 0x01000000
flash erase 0x00000000 0x01000000
flash lock 0x00000000 0x01000000
flash unlock 0x00000000 0x01000000
flash query 0x00000000 0x01000000
flash program bl2_bp.bin bin 0x00000000
flash verify bl2_bp.bin bin 0x00000000

* Erase first 1 MB of the QSPI Flash

rzg2> '''flash erase 0 1024*1024'''
erasing at 0x00000000 (block #0)
erasing at 0x00010000 (block #1)
erasing at 0x00020000 (block #2)
erasing at 0x00030000 (block #3)
erasing at 0x00040000 (block #4)
erasing at 0x00050000 (block #5)
erasing at 0x00060000 (block #6)
erasing at 0x00070000 (block #7)
erasing at 0x00080000 (block #8)
erasing at 0x00090000 (block #9)
erasing at 0x000A0000 (block #10)
erasing at 0x000B0000 (block #11)
erasing at 0x000C0000 (block #12)
erasing at 0x000D0000 (block #13)
erasing at 0x000E0000 (block #14)
erasing at 0x000F0000 (block #15)
++ info: successfully erased 1 MB in 6.91 sec

* Program BL2
rzg2> '''flash program bl2_bp-rnx-rzg2ul-osm.bin'''
++ info: Programming image file: tftp://192.168.3.5/bl2_bp-rnx-rzg2ul-osm.bin
++ info: Programming using agent, buffer = 29952 bytes
++ info: At absolute address: 0x00000000
programming at 0x00000000
programming at 0x00007500

++ info: successfully programmed 50.55 KB in 0.72 sec

* Program BL31+U-BOOT
rzg2> '''flash program fip-rnx-rzg2ul-osm.bin 0x1D200'''
++ info: Programming image file: tftp://192.168.3.5/fip-rnx-rzg2ul-osm.bin
++ info: Programming using agent, buffer = 29952 bytes
++ info: At absolute address: 0x0001D200
programming at 0x0001D400
programming at 0x00024900
programming at 0x0002BE00
programming at 0x00033300
programming at 0x0003A800
programming at 0x00041D00
programming at 0x00049200
programming at 0x00050700
programming at 0x00057C00
programming at 0x0005F100
programming at 0x00066600
programming at 0x0006DB00
programming at 0x00075000
programming at 0x0007C500
programming at 0x00083A00
programming at 0x0008AF00
programming at 0x00092400
programming at 0x00099900
programming at 0x000A0E00
programming at 0x000A8300
programming at 0x000AF800
programming at 0x000B6D00
programming at 0x000BE200
programming at 0x000C5700
programming at 0x0001D200
programming at 0x000CCC00

++ info: successfully programmed 722.60 KB in 8.73 sec

== Programming QSPI Flash using Renesas Flash Writer ==
=== Serial terminal connection ===
A serial terminal connection through USB to UART bridge is required.
On the carrier board, set the boot mode to "SCIF Download mode".
{| class="wikitable"
|-
!
! J31, pin 1-2
! J31, pin 3-4
|-
| SCIF Download mode
| close
| open
|-
| QSPI Boot mode
| open
| close
|-
| eMMC Boot mode
| close
| close
|}

* Connect a USB Type-microAB cable to J3 (UART DBG).
* Start a terminal app (for example minicom) and configure to use the second FTDI port.
* After power up, the CPU reports:
(C) Renesas Electronics Corp.
-- Load Program to System RAM ---------------
please send !

=== Programming Bootloaders ===
==== Download Flash Writer to RAM ====
In minicom, press Ctrl-A S and then select "ascii" upload protocol. 
Select the file tmp/deploy/images/rnx-rzg2ul-osm/Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot
After successfully downloading the binary, Flash Writer starts automatically and shows a message
like below on the terminal.
DDR init done.
=== DDR R/W CHECK ====
Check: 41000000, Length: 01000000
Pass!

Flash writer for RZ/G2 Series V1.06 Aug.10,2022
Product Code : RZ/G2UL Type1
>

==== Programming ====
For the boot operation, two bootloader files need to be written to the target board: 
* tmp/deploy/images/rnx-rzg2ul-osm/bl2_bp-rnx-rzg2ul-osm.srec (BL2 bootloader + boot parameters)
* tmp/deploy/images/rnx-rzg2ul-osm/fip-rnx-rzg2ul-osm.srec (BL3 + U-BOOT)

“XLS2” command of Flash Writer is used to write bootloader binary files. This command receives binary data from the
serial port and writes the data to a specified address of the Flash ROM with information where the data should be
loaded on the address of the main memory.

>xls2
===== Qspi writing of RZ/G2 Board Command =============
Load Program to Spiflash
Writes to any of SPI address.
Dialog : AT25QL128A
Program Top Address & Qspi Save Address
===== Please Input Program Top Address ============
Please Input : H''''''11E00'''''

===== Please Input Qspi Save Address ===
Please Input : H''''''0'''''
Work RAM(H'50000000-H'53FFFFFF) Clear....
please send ! ('.' & CR stop load)

* Send the data of '''bl2_bp-rnx-rzg2ul-osm.srec''' from terminal software after the message “please send !” is shown. 
After successfully download the binary, messages like below are shown on the terminal. 
OK
SAVE SPI-FLASH.......
======= Qspi Save Information =================
SpiFlashMemory Stat Address : H'00000000
SpiFlashMemory End Address : H'0000CA38
===========================================================

Next, write another loader file by using XLS2 command again. 

>xls2
===== Qspi writing of RZ/G2 Board Command =============
Load Program to Spiflash
Writes to any of SPI address.
Dialog : AT25QL128A
Program Top Address & Qspi Save Address
===== Please Input Program Top Address ============
Please Input : H''''''0'''''

===== Please Input Qspi Save Address ===
Please Input : H''''''1D200'''''
Work RAM(H'50000000-H'53FFFFFF) Clear....
please send ! ('.' & CR stop load)

* Send the data of '''fip-rnx-rzg2ul-osm.srec''' from terminal software after the message "please send !" is shown. 
After successfully download the binary, messages like below are shown on the terminal. 
OK
SAVE SPI-FLASH.......
======= Qspi Save Information =================
SpiFlashMemory Stat Address : H'0001D200
SpiFlashMemory End Address : H'000D19DF
===========================================================

= Write Linux Kernel and RootFS to a uSD card =
The simplest way to write Linux Kernel and RootFS to a SD card is using the bmaptool: 
$ sudo bmaptool copy tmp/deploy/images/rnx-rzg2ul-osm/core-image-bsp-rnx-rzg2ul-osm.wic.gz /dev/sdX

= Boot log =
* Select QSPI Boot mode and reset the board:
NOTICE: BL2: v2.9(release):215afc594-dirty
NOTICE: BL2: Built : 14:25:58, Oct 31 2023
NOTICE: BL2: Booting BL31
NOTICE: BL31: v2.9(release):215afc594-dirty
NOTICE: BL31: Built : 14:25:58, Oct 31 2023

U-Boot 2021.10 (Oct 30 2023 - 16:04:05 +0000)

CPU: Renesas Electronics K rev 8.7
Model: rnx-rzg2ul-osm
DRAM: 896 MiB
WDT: watchdog@0000000012800800
WDT: Started with servicing (60s timeout)
MMC: sd@11c00000: 0, sd@11c10000: 1
Loading Environment from MMC... OK
In: serial@1004b800
Out: serial@1004b800
Err: serial@1004b800
U-boot WDT started!
Net: eth0: ethernet@11c20000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
17699328 bytes read in 1461 ms (11.6 MiB/s)
27809 bytes read in 4 ms (6.6 MiB/s)
Moving Image from 0x48080000 to 0x48200000, end=49350000
## Flattened Device Tree blob at 48000000
Booting using the fdt blob at 0x48000000
Loading Device Tree to 0000000057ff6000, end 0000000057fffca0 ... OK

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
[ 0.000000] Linux version 5.10.184-cip36-yocto-standard (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 8.3.01
[ 0.000000] Machine model: Ronetix RNX-RZG2UL-OSM based on r9a07g043u11

← Older revision		Revision as of 16:44, 16 November 2023
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	{{#vardefine:URL_PEEDI\|https://ronetix.at/product/peedi-jtag-swd-bdm-emulator-and-flash-programmer}}		{{#vardefine:URL_PEEDI\|https://ronetix.at/product/peedi-jtag-swd-bdm-emulator-and-flash-programmer}}
	[[File:RNX-RZG2UL-OSM_top.png\|thumb]]		[[File:RNX-RZG2UL-OSM_top.png\|thumb]]
	= Overview =		== Overview ==
	For a complete Linux System, the CPU Module {{#var:HARDWARE_NAME}} requires the following images:		For a complete Linux System, the CPU Module {{#var:HARDWARE_NAME}} requires the following images:
	* Boot Loader stage 2 (BL2) Trusted Boot Firmware with boot parameters block		* Boot Loader stage 2 (BL2) Trusted Boot Firmware with boot parameters block
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	= Programming BL2, BL31 and U-BOOT =		== Programming BL2, BL31 and U-BOOT ==
	On the carrier board, set the boot mode to "SCIF Download mode".		On the carrier board, set the boot mode to "SCIF Download mode".
	{\| class="wikitable"		{\| class="wikitable"
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	== Programming QSPI Flash using PEEDI JTAG Flash Programmer ==		=== Programming QSPI Flash using PEEDI JTAG Flash Programmer ===
	PEEDI should be configured to use the '''rzg2ul.cfg''' configuration file.<br>		PEEDI should be configured to use the '''rzg2ul.cfg''' configuration file.<br>

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	== Programming QSPI Flash using Renesas Flash Writer ==		=== Programming QSPI Flash using Renesas Flash Writer ===
	=== Serial terminal connection ===		==== Serial terminal connection ====
	A serial terminal connection through USB to UART bridge is required.		A serial terminal connection through USB to UART bridge is required.
	* Connect a USB Type-microAB cable to J3 (UART DBG).		* Connect a USB Type-microAB cable to J3 (UART DBG).
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	please send !		please send !

	=== Programming Bootloaders ===		==== Programming Bootloaders ====
	==== Download Flash Writer to RAM ====		===== Download Flash Writer to RAM =====
	In minicom, press Ctrl-A S and then select "ascii" upload protocol.<br>		In minicom, press Ctrl-A S and then select "ascii" upload protocol.<br>
	Select the file tmp/deploy/images/rnx-rzg2ul-osm/Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot		Select the file tmp/deploy/images/rnx-rzg2ul-osm/Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot
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	>		>

	==== Programming ====		===== Programming =====
	For the boot operation, two bootloader files need to be written to the target board:<br>		For the boot operation, two bootloader files need to be written to the target board:<br>
	* tmp/deploy/images/rnx-rzg2ul-osm/bl2_bp-rnx-rzg2ul-osm.srec (BL2 bootloader + boot parameters)		* tmp/deploy/images/rnx-rzg2ul-osm/bl2_bp-rnx-rzg2ul-osm.srec (BL2 bootloader + boot parameters)
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	= Write Linux Kernel and RootFS to a uSD card =		== Write Linux Kernel and RootFS to a uSD card ==
	The simplest way to write Linux Kernel and RootFS to a SD card is using the bmaptool:<br>		The simplest way to write Linux Kernel and RootFS to a SD card is using the bmaptool:<br>
	$ sudo bmaptool copy tmp/deploy/images/rnx-rzg2ul-osm/core-image-bsp-rnx-rzg2ul-osm.wic.gz /dev/sdX		$ sudo bmaptool copy tmp/deploy/images/rnx-rzg2ul-osm/core-image-bsp-rnx-rzg2ul-osm.wic.gz /dev/sdX

	= Boot log =		== Boot log ==
	* Select QSPI Boot mode and reset the board:		* Select QSPI Boot mode and reset the board:
	NOTICE: BL2: v2.9(release):215afc594-dirty		NOTICE: BL2: v2.9(release):215afc594-dirty
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	[ 0.000000] Linux version 5.10.184-cip36-yocto-standard (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 8.3.01		[ 0.000000] Linux version 5.10.184-cip36-yocto-standard (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 8.3.01
	[ 0.000000] Machine model: Ronetix RNX-RZG2UL-OSM based on r9a07g043u11		[ 0.000000] Machine model: Ronetix RNX-RZG2UL-OSM based on r9a07g043u11


			<!-- use template -->
			{{SeeAlso}}