RNX-RZG2UL-OSM Yocto Linux: Difference between revisions
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{{#vardefine:HARDWARE_NAME|RNX-RZG2UL-OSM}} | {{#vardefine:HARDWARE_NAME|RNX-RZG2UL-OSM}} | ||
{{#vardefine:URL_PEEDI|[https://ronetix.at/product/peedi-jtag-swd-bdm-emulator-and-flash-programmer/ PEEDI]}} | |||
= Overview = | = Overview = | ||
The Yocto Project is an open source collaboration project that helps developers create custom Linux-based systems for embedded products, regardless of the hardware architecture.<br> | The Yocto Project is an open source collaboration project that helps developers create custom Linux-based systems for embedded products, regardless of the hardware architecture.<br> | ||
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The resulted images are located in tmp/deploy/images/rnx-rzg2ul-osm | The resulted images are located in tmp/deploy/images/rnx-rzg2ul-osm | ||
= Programming images = | |||
The bootloaders (BL2, BL3 and U-BOOT) and the Linux Kernel can be programmed on the QSPI Flash or on the eMMC.<br> | |||
The RoorFS can be programmed on the eMMC or on a SD card (J41 on the carrier board). | |||
More information can be found in "r01us0616ej0100-rz-g(Linux Start-up Guide RZG2L,LC,UL).pdf" which is part of | |||
the Renesas RZG Verified Linux Package: <br> | |||
* https://www.renesas.com/us/en/document/swo/rzg-verified-linux-package-v305rtk0ef0045z0021azj-v305zip?r=1597481 <br> | |||
or <br> | |||
* http://download.ronetix.at/boards/doc/RNX-RZG2UL-OSM/RTK0EF0045Z0021AZJ-v3.0.5.zip | |||
== Serial terminal connection == | |||
A serial terminal connection through USB to UART bridge is required. | |||
On the carrier board, set the boot mode to "SCIF Download mode". | |||
{| class="wikitable" | |||
|- | |||
! | |||
! J31, pin 1-2 | |||
! J31, pin 3-4 | |||
|- | |||
| SCIF Download mode | |||
| close | |||
| open | |||
|- | |||
| QSPI Boot mode | |||
| open | |||
| close | |||
|- | |||
| eMMC Boot mode | |||
| close | |||
| close | |||
|} | |||
* Connect a USB Type-microAB cable to J3 (UART DBG). | |||
* Start a terminal app (for example minicom) and configure to use the second FTDI port. | |||
* After power up, the CPU reports: | |||
(C) Renesas Electronics Corp. | |||
-- Load Program to System RAM --------------- | |||
please send ! | |||
== Programming Bootloaders and Linux Kernel on the QSPI Flash == | |||
=== Download Flash Writer to RAM === | |||
In minicom, press Ctrl-A S and then select "ascii" upload protocol.<br> | |||
Select the file tmp/deploy/images/rnx-rzg2ul-osm/Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot | |||
After successfully downloading the binary, Flash Writer starts automatically and shows a message | |||
like below on the terminal. | |||
DDR init done. | |||
=== DDR R/W CHECK ==== | |||
Check: 41000000, Length: 01000000 | |||
Pass! | |||
Flash writer for RZ/G2 Series V1.06 Aug.10,2022 | |||
Product Code : RZ/G2UL Type1 | |||
> | |||
=== Programming Bootloaders === | |||
For the boot operation, two bootloader files need to be written to the target board:<br> | |||
* tmp/deploy/images/rnx-rzg2ul-osm/bl2_bp-rnx-rzg2ul-osm.srec (BL2 bootloader + boot parameters) | |||
* tmp/deploy/images/rnx-rzg2ul-osm/fip-rnx-rzg2ul-osm.srec (BL3 + U-BOOT) | |||
“XLS2” command of Flash Writer is used to write bootloader binary files. This command receives binary data from the | |||
serial port and writes the data to a specified address of the Flash ROM with information where the data should be | |||
loaded on the address of the main memory. | |||
>xls2 | |||
===== Qspi writing of RZ/G2 Board Command ============= | |||
Load Program to Spiflash | |||
Writes to any of SPI address. | |||
Dialog : AT25QL128A | |||
Program Top Address & Qspi Save Address | |||
===== Please Input Program Top Address ============ | |||
Please Input : H''''''11E00''''' | |||
===== Please Input Qspi Save Address === | |||
Please Input : H''''''0''''' | |||
Work RAM(H'50000000-H'53FFFFFF) Clear.... | |||
please send ! ('.' & CR stop load) | |||
* Send the data of '''bl2_bp-rnx-rzg2ul-osm.srec''' from terminal software after the message “please send !” is shown.<br> | |||
After successfully download the binary, messages like below are shown on the terminal.<br> | |||
OK | |||
SAVE SPI-FLASH....... | |||
======= Qspi Save Information ================= | |||
SpiFlashMemory Stat Address : H'00000000 | |||
SpiFlashMemory End Address : H'0000CA38 | |||
=========================================================== | |||
Next, write another loader file by using XLS2 command again.<br> | |||
>xls2 | |||
===== Qspi writing of RZ/G2 Board Command ============= | |||
Load Program to Spiflash | |||
Writes to any of SPI address. | |||
Dialog : AT25QL128A | |||
Program Top Address & Qspi Save Address | |||
===== Please Input Program Top Address ============ | |||
Please Input : H''''''0''''' | |||
===== Please Input Qspi Save Address === | |||
Please Input : H''''''1D200''''' | |||
Work RAM(H'50000000-H'53FFFFFF) Clear.... | |||
please send ! ('.' & CR stop load) | |||
* Send the data of '''fip-rnx-rzg2ul-osm.srec''' from terminal software after the message "please send !" is shown.<br> | |||
After successfully download the binary, messages like below are shown on the terminal.<br> | |||
OK | |||
SAVE SPI-FLASH....... | |||
======= Qspi Save Information ================= | |||
SpiFlashMemory Stat Address : H'0001D200 | |||
SpiFlashMemory End Address : H'000D19DF | |||
=========================================================== | |||
* Select QSPI Boot mode and reset the board: | |||
NOTICE: BL2: v2.9(release):215afc594-dirty | |||
NOTICE: BL2: Built : 14:25:58, Oct 31 2023 | |||
NOTICE: BL2: Booting BL31 | |||
NOTICE: BL31: v2.9(release):215afc594-dirty | |||
NOTICE: BL31: Built : 14:25:58, Oct 31 2023 | |||
U-Boot 2021.10 (Oct 30 2023 - 16:04:05 +0000) | |||
CPU: Renesas Electronics K rev 8.7 | |||
Model: rnx-rzg2ul-osm | |||
DRAM: 896 MiB | |||
WDT: watchdog@0000000012800800 | |||
WDT: Started with servicing (60s timeout) | |||
MMC: sd@11c00000: 0, sd@11c10000: 1 | |||
Loading Environment from MMC... OK | |||
In: serial@1004b800 | |||
Out: serial@1004b800 | |||
Err: serial@1004b800 | |||
U-boot WDT started! | |||
Net: eth0: ethernet@11c20000 | |||
Hit any key to stop autoboot: 0 | |||
= See also = | = See also = |
Revision as of 11:34, 6 November 2023
Overview
The Yocto Project is an open source collaboration project that helps developers create custom Linux-based systems for embedded products, regardless of the hardware architecture.
This article show how to build Yocto Image for RNX-RZG2UL-OSM CPU module using:
Yocto | Linux Kernel | U-BOOT |
---|---|---|
Poky | 5.10.184 | 2021.10 |
Installing required packages
Please make sure your host PC is running Ubuntu 20.04+ 64-bit and install the following packages:
$ sudo apt-get install gawk wget git diffstat unzip texinfo gcc-multilib \ build-essential chrpath socat cpio python3 python3-pip python3-pexpect \ xz-utils debianutils iputils-ping libsdl1.2-dev xterm $ sudo apt-get install autoconf libtool libglib2.0-dev libarchive-dev python-git-doc \ sed cvs subversion coreutils texi2html docbook-utils \ help2man make gcc g++ desktop-file-utils libgl1-mesa-dev libglu1-mesa-dev \ mercurial automake groff curl lzop asciidoc u-boot-tools dos2unix mtd-utils pv \ libncurses5 libncurses5-dev libncursesw5-dev libelf-dev zlib1g-dev bmap-tools
More details about the Yocto Environment Setup can be found on the Yocto official site
Download Yocto based on Renesas Verified Linux Package
$ git config --global user.name "Your Name" $ git config --global user.email "Your Email"
$ mkdir ~/yocto-renesas $ cd ~/yocto-renesas
- Download the Renesas Verified Linux Package
$ git clone https://github.com/ronetix/rzg_vlp.git $ cd rzg_vlp
Setup and build Yocto
$ TEMPLATECONF=$PWD/meta-renesas/meta-rzg2l/docs/template/conf/ source poky/oe-init-build-env build $ MACHINE=rnx-rzg2ul-osm bitbake core-image-bsp
Build Results
The resulted images are located in tmp/deploy/images/rnx-rzg2ul-osm
Programming images
The bootloaders (BL2, BL3 and U-BOOT) and the Linux Kernel can be programmed on the QSPI Flash or on the eMMC.
The RoorFS can be programmed on the eMMC or on a SD card (J41 on the carrier board).
More information can be found in "r01us0616ej0100-rz-g(Linux Start-up Guide RZG2L,LC,UL).pdf" which is part of
the Renesas RZG Verified Linux Package:
or
Serial terminal connection
A serial terminal connection through USB to UART bridge is required. On the carrier board, set the boot mode to "SCIF Download mode".
J31, pin 1-2 | J31, pin 3-4 | |
---|---|---|
SCIF Download mode | close | open |
QSPI Boot mode | open | close |
eMMC Boot mode | close | close |
- Connect a USB Type-microAB cable to J3 (UART DBG).
- Start a terminal app (for example minicom) and configure to use the second FTDI port.
- After power up, the CPU reports:
(C) Renesas Electronics Corp. -- Load Program to System RAM --------------- please send !
Programming Bootloaders and Linux Kernel on the QSPI Flash
Download Flash Writer to RAM
In minicom, press Ctrl-A S and then select "ascii" upload protocol.
Select the file tmp/deploy/images/rnx-rzg2ul-osm/Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot
After successfully downloading the binary, Flash Writer starts automatically and shows a message
like below on the terminal.
DDR init done. === DDR R/W CHECK ==== Check: 41000000, Length: 01000000 Pass! Flash writer for RZ/G2 Series V1.06 Aug.10,2022 Product Code : RZ/G2UL Type1 >
Programming Bootloaders
For the boot operation, two bootloader files need to be written to the target board:
- tmp/deploy/images/rnx-rzg2ul-osm/bl2_bp-rnx-rzg2ul-osm.srec (BL2 bootloader + boot parameters)
- tmp/deploy/images/rnx-rzg2ul-osm/fip-rnx-rzg2ul-osm.srec (BL3 + U-BOOT)
“XLS2” command of Flash Writer is used to write bootloader binary files. This command receives binary data from the serial port and writes the data to a specified address of the Flash ROM with information where the data should be loaded on the address of the main memory.
>xls2 ===== Qspi writing of RZ/G2 Board Command ============= Load Program to Spiflash Writes to any of SPI address. Dialog : AT25QL128A Program Top Address & Qspi Save Address ===== Please Input Program Top Address ============ Please Input : H'11E00
===== Please Input Qspi Save Address === Please Input : H'0 Work RAM(H'50000000-H'53FFFFFF) Clear.... please send ! ('.' & CR stop load)
- Send the data of bl2_bp-rnx-rzg2ul-osm.srec from terminal software after the message “please send !” is shown.
After successfully download the binary, messages like below are shown on the terminal.
OK SAVE SPI-FLASH....... ======= Qspi Save Information ================= SpiFlashMemory Stat Address : H'00000000 SpiFlashMemory End Address : H'0000CA38 ===========================================================
Next, write another loader file by using XLS2 command again.
>xls2 ===== Qspi writing of RZ/G2 Board Command ============= Load Program to Spiflash Writes to any of SPI address. Dialog : AT25QL128A Program Top Address & Qspi Save Address ===== Please Input Program Top Address ============ Please Input : H'0
===== Please Input Qspi Save Address === Please Input : H'1D200 Work RAM(H'50000000-H'53FFFFFF) Clear.... please send ! ('.' & CR stop load)
- Send the data of fip-rnx-rzg2ul-osm.srec from terminal software after the message "please send !" is shown.
After successfully download the binary, messages like below are shown on the terminal.
OK SAVE SPI-FLASH....... ======= Qspi Save Information ================= SpiFlashMemory Stat Address : H'0001D200 SpiFlashMemory End Address : H'000D19DF ===========================================================
- Select QSPI Boot mode and reset the board:
NOTICE: BL2: v2.9(release):215afc594-dirty NOTICE: BL2: Built : 14:25:58, Oct 31 2023 NOTICE: BL2: Booting BL31 NOTICE: BL31: v2.9(release):215afc594-dirty NOTICE: BL31: Built : 14:25:58, Oct 31 2023 U-Boot 2021.10 (Oct 30 2023 - 16:04:05 +0000) CPU: Renesas Electronics K rev 8.7 Model: rnx-rzg2ul-osm DRAM: 896 MiB WDT: watchdog@0000000012800800 WDT: Started with servicing (60s timeout) MMC: sd@11c00000: 0, sd@11c10000: 1 Loading Environment from MMC... OK In: serial@1004b800 Out: serial@1004b800 Err: serial@1004b800 U-boot WDT started! Net: eth0: ethernet@11c20000 Hit any key to stop autoboot: 0